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HT9200A/B DTMF Generators
Features
* * *
Operating voltage: 2.0V~5.5V Serial mode for the HT9200A Serial/parallel mode for the HT9200B
* * *
Low standby current Low total harmonic distortion 3.58MHz crystal or ceramic resonator
General Description
The HT9200A/B tone generators are designed for C interfaces. They can be instructed by a C to generate 16 dual tones and 8 single tones from the DTMF pin. The HT9200A provides a serial mode whereas the HT9200B contains a selectable serial/parallel mode interface for various applications such as security systems, home automation, remote control through telephone lines, communication systems, etc.
Selection Table
Block Diagram
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HT9200A/B
Pin Assignment
Pad Assignment
Pad Coordinates
Pad No.
1 2 3 4 5 6 7
Unit: m
X
-553.30
Y
430.40
Pad No.
8 9 10 11 12 13
X
553.30 553.30 553.30 553.30 374.90 -279.30
Y
-523.50 -190.30 4.70 340.30 523.50 523.50
-553.30 -133.50 -553.30 -328.50 -553.30 -523.50 -220.10 -523.50 -25.10 308.10 -523.50 -523.50
Chip size: 1460 x 1470 (m)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
Pin Description
Pin Name
CE X2 X1 VSS NC
I/O
I O
Internal Connection
CMOS IN Pull-high Chip enable, active low
Description
Oscillator I -- -- -- --
The system oscillator consists of an inverter, a bias resistor, and the required load capacitor on chip. The oscillator function can be implemented by Connect a standard 3.579545MHz crystal to the X1 and X2 terminals. Negative power supply No connection
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HT9200A/B
Internal Connection
CMOS IN Pull-high or floating
Pin Name
I/O
Description
Data inputs for the parallel mode When the IC is operating in the serial mode, the data input terminals (D0~D3) are included with a pull-high resistor. When the IC is operating in the parallel mode, these pins become floating. Operation mode selection input S/P="H": Parallel mode S/P="L": Serial mode Data synchronous clock input for the serial mode When the IC is operating in the parallel mode, the input terminal (CLK) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating. Data input terminal for the serial mode When the IC is operating in the parallel mode, the input terminal (DATA) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating. Output terminal of the DTMF signal Positive power supply, 2.0V~5.5V for normal operation
D0~D3
I
S/P
I
CMOS IN
CLK
I
CMOS IN Pull-high or floating CMOS IN Pull-high or floating CMOS OUT --
DATA
I
DTMF VDD
O --
Approximate internal connection circuits
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HT9200A/B
Absolute Maximum Ratings*
Supply Voltage ................................. -0.3V to 6V Input Voltage.................... VSS-0.3 to VDD+0.3V Storage Temperature................. -50C to 125C Operating Temperature............... -20C to 75C
*Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristics
Symbol
VDD IDD VIL VIH ISTB RP tDE VTDC ITOL VTAC ACR RL tHD fCLK tUP fOSC
Ta=25C
Parameter
Operating Voltage Operating Current "Low" Input Voltage "High" Input Voltage Standby Current Pull-high Resistance DTMF Output Delay Time (Parallel Mode) DTMF Output DC Level DTMF Sink Current DTMF Output AC Level Column Pre-emphasis DTMF Output Load Tone Signal Distortion Clock Input Rate (Serial Mode)
Test Conditions VDD
--
Conditions
--
Min.
2 -- -- VSS 0.8VDD -- -- 120 45
Typ.
-- 240 950 -- -- -- -- 180 68 tUP+6 -- -- 0.15 2 -- -30 100
Max.
5.5 2500 3000 0.2VDD VDD 1 2 270 100 tUP+8 0.75VDD -- 0.18 3 -- -23 500
Unit
V
A
2.5V S/P=VDD,D0~D3=VSS, 5.0V CE=VSS, No load -- -- -- --
V V
A
2.5V S/P=VDD,CE=VDD, 5.0V No load 2.5V 5.0V 5V VOL=0V --
k ms V mA Vrms dB k dB kHz
-- 0.45VDD -0.1 0.12 1 5 --
2V~ DTMF Output 5.5V 2.5V VDTMF=0.5V 2.5V Row group, RL=5k 2.5V Row group=0dB 2.5V tHD -23dB 2.5V RL=5k -- --
--
The time from CE Oscillator Starting 5.0V falling edge to normal Time (When CE is low) oscillator operation System Frequency -- Crystal=3.5795MHz
--
--
10 3.5831
ms MHz
3.5759 3.5795
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HT9200A/B
Functional Description
The HT9200A/B are DTMF generators for C interfaces. They are controlled by a C in the serial mode or the parallel mode (for the HT9200B only).
Serial mode (HT9200A/B)
The HT9200A/B employ a data input, a 5-bit code, and a synchronous clock to transmit a
DTMF signal. Every digit of a phone number to be transmitted is selected by a series of inputs which consist of 5-bit data. Of the 5 bits, the D0(LSB) is the first received bit. The HT9200A/B will latch data on the falling edge of the clock (CLK pin). The relationship between the digital codes and the tone output frequency is shown in Table 1. As for the control timing diagram, refer to Figure 1.
Table 1: Digits vs. input data vs. tone output frequency (serial mode)
Digit
1 2 3 4 5 6 7 8 9 0
#
D4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1
D3
0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1
D2
0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 1 1 1
D1
0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 1
D0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1
Tone Output Frequency (Hz)
697+1209 697+1336 697+1477 770+1209 770+1336 770+1477 852+1209 852+1336 852+1477 941+1336 941+1209 941+1477 697+1633 770+1633 852+1633 941+1633 697 770 852 941 1209 1336 1477 1633 --
A B C D -- -- -- -- -- -- -- -- DTMF OFF
*Notes: The codes not listed in Table 1 are not used D4 is MSB
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HT9200A/B
When the system is operating in the serial mode a pull-high resistor is attached to D0~D3 (for parallel mode) on the input terminal. For the HT9200B, the S/P pin has to be connected low for serial mode operation.
Parallel mode ( HT9200B)
connected low to transmit the DTMF signal from the DTMF pin. The TDE time (about 6ms) will be delayed from the CE falling edge to the DTMF signal output. The relationship between the digital codes and the tone output frequency is illustrated in Table 2. As for the control timing diagram, see Figure 2. When the system is operating in the parallel mode, D0~D3 are all in the floating state. Thus, these data input pins should not float.
The HT9200B provides four data inputs D0~D3 to generate their corresponding DTMF signals. The S/P has to be connected high to select the parallel operation mode. Then the input data codes should be determined. Finally, the CE is
Figure 1
Table 2: Digits vs. input data vs. tone output frequency (parallel mode)
Digit
1 2 3 4 5 6 7 8
D3
0 0 0 0 0 0 0 1
D2
0 0 0 1 1 1 1 0
D1
0 1 1 0 0 1 1 0
D0
1 0 1 0 1 0 1 0
Tone Output Frequency (Hz)
697+1209 697+1336 697+1477 770+1209 770+1336 770+1477 852+1209 852+1336
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HT9200A/B
Digit
9 0
#
D3
1 1 1 1 1 1 1 0
D2
0 0 0 1 1 1 1 0
D1
0 1 1 0 0 1 1 0
D0
1 0 1 0 1 0 1 0
Tone Output Frequency (Hz)
852+1477 941+1336 941+1209 941+1477 697+1633 770+1633 852+1633 941+1633
A B C D
Figure 2
Tone frequency
Output Frequency (Hz) Specified
697 770 852 941 1209 1336 1477
Actual
699 766 847 948 1215 1332 1472
%Error
+0.29% -0.52% -0.59% +0.74% +0.50% -0.30% -0.34%
% Error does not contain the crystal frequency drift
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HT9200A/B
Application Circuits
Serial mode
Serial/parallel mode
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21st Aug '98

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